Siemens EF 88H Series Uživatelský manuál

Addendum to User's Manual SAB 80C517/80C537 05.94Microcomputer ComponentsSAB 80C517A/83C517A-58-Bit CMOS Single-Chip Microcontroller

Semiconductor Group 3 - 2Memory Organization3.1 Program Memory, ROM ProtectionThe SAB 83C517A-5 has 32 Kbyte of on-chip ROM, while the SAB 80C517A has

Device SpecificationSemiconductor Group 7-38Reload of Timer 2A 16-bit reload can be performed with the 16-bit CRC register, which is a concatenation o

Device SpecificationSemiconductor Group 7-39Figure 6Block Diagram of Timer 2

Device SpecificationSemiconductor Group 7-40Figure 7Block Diagram of the Compare TimerFigure 8Compare-Mode 0 with Registers CM0 to CM7

Device SpecificationSemiconductor Group 7-41Figure 9Compare-Mode 2 (Port 5 only)

Device SpecificationSemiconductor Group 7-42Interrupt StructureThe SAB 80C517A has 17 interrupt vectors with the following vector addresses and reques

Device SpecificationSemiconductor Group 7-43 Figure 10Interrupt Structure of the SAB 80C517A

Device SpecificationSemiconductor Group 7-44Figure 10Interrupt Structure of the SAB 80C517A (cont’d)

Device SpecificationSemiconductor Group 7-45Figure 10Interrupt Structure of the SAB 80C517A (cont’d)

Device SpecificationSemiconductor Group 7-46Multiplication/Division UnitThis on-chip arithmetic unit provides fast 32-bit division, 16-bit multiplicat

Device SpecificationSemiconductor Group 7-47Table 6Performing a MDU-Calculation Table 7Shift Operation with the MDU Abbrevia

Semiconductor Group 3 - 3Memory Organization3.2 Data MemoryThe data memory space consists of an internal and an external memory space. The SAB 80C517A

Device SpecificationSemiconductor Group 7-48with internal pull-up resistors. That means, when configured as inputs, ports 1 to 6 will be pulled high a

Device SpecificationSemiconductor Group 7-49Power Saving ModesThe SAB 80C517A provides – due to Siemens ACMOS technology – four modes in which pow-er

Device SpecificationSemiconductor Group 7-50Requirements for Hardware Power Down ModeThere is no dedicated pin to enable the Hardware Power Down Mode.

Device SpecificationSemiconductor Group 7-51Power Down ModeThe power down mode is entered by two consecutive instructions directly following each othe

Device SpecificationSemiconductor Group 7-52Table 8Status of all pins during Idle Mode, Power Down Mode and Hardware Power Down Mode Pins I

Device SpecificationSemiconductor Group 7-53Table 8Status of all pins during Idle Mode, Power Down Mode and Hardware Power Down Mode (cont’d)

Device SpecificationSemiconductor Group 7-54Serial InterfacesThe SAB 80C517A has two serial interfaces. Both interfaces are full duplex and receive bu

Device SpecificationSemiconductor Group 7-55Serial Interface 0Serial Interface 0 can operate in 4 modes:Mode 0: Shift register mode:Serial data enter

Device SpecificationSemiconductor Group 7-56Serial Interface 1Serial interface 1 can operate in two asynchronous modes:Mode A: 9-bit UART, variable b

Device SpecificationSemiconductor Group 7-57Watchdog UnitsThe SAB 80C517A offers two enhanced fail safe mechanisms, which allow an automatic recovery

Semiconductor Group 3 - 4Memory Organization3.3 Special Function RegistersAll registers, except the program counter and the four general purpose regis

Device SpecificationSemiconductor Group 7-58Oscillator WatchdogThe unit serves three functions:– Monitoring of the on-chip oscillator’s function.The w

Device SpecificationSemiconductor Group 7-59 Figure 12Functional Block Diagram of the Oscillator Watchdog

Device SpecificationSemiconductor Group 7-60Fast internal reset after power-onThe SAB 80C517A can use the oscillator watchdog unit for a fast internal

Device SpecificationSemiconductor Group 7-61Absolute Maximum RatingsAmbient temperature under bias...

Device SpecificationSemiconductor Group 7-62 DC Characteristics (cont’d)Parameter Symbol Limit Values Unit Test conditionmin. max.Output low v

Device SpecificationSemiconductor Group 7-63Notes for page 62:1) Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimpose

Device SpecificationSemiconductor Group 7-64A/D Converter CharacteristicsVCC= 5 V + 10 %, – 15 %; V SS= 0 VVAREF = VCC ± 5%; VAGND = VSS± 0.2 V;TA=

Device SpecificationSemiconductor Group 7-65AC CharacteristicsV CC = 5 V + 10 %, – 15 %; V SS = 0 VT A = 0 to 70 oC for the SAB 80C517A/83C51

Device SpecificationSemiconductor Group 7-66AC Characteristics (cont’d)Parameter Symbol Limit values Unit18 MHz clock Variable clock1/t CLCL = 3.5 MHz

Device SpecificationSemiconductor Group 7-67Program Memory Read CycleData Memory Read CycleMCT00096ALEPSENPort 2LHLLtA8 - A15 A8 - A15A0 - A7 Instr.IN

Semiconductor Group 3 - 5Memory OrganizationTable 3-1, Special Function Register (cont´d) 1) : Bit-addressable Special Function RegisterAddress Reg

Device SpecificationSemiconductor Group 7-68 Data Memory Write Cycle MCT00098ALEPSENPort 2WHLHtPort 0WRtWLWHtLLWLtQVWXtAVLLtLLAX2tQVWHtAVWLt

Device SpecificationSemiconductor Group 7-69AC Characteristics (cont’d) External Clock CycleParameter Symbol Limit

Device SpecificationSemiconductor Group 7-70AC Characteristics (cont’d) System Clock TimingParameter Symbol Limit values Unit18

Device SpecificationSemiconductor Group 7-71ROM Verification CharacteristicsTA = 25°C ± 5°C; VCC = 5 V ± 10%; VSS = 0 V RO

Device SpecificationSemiconductor Group 7-72ROM Verification Mode 2 (New Verify Mode for Protected and not Protected ROM) ROM Verification Mode 2

Device SpecificationSemiconductor Group 7-73Application Circuitry for Verifying the Internal ROM

Device SpecificationSemiconductor Group 7-74AC Testing: Input, Output Waveforms AC Testing: Float Waveforms Recommended Oscillator CircuitsAC Inputs

Device SpecificationSemiconductor Group 7-75Package OutlinesSMD = Surface Mounted DeviceDimensions in mmDimensions in mmPlastic Package, P-MQFP-100-2

Semiconductor Group 3 - 6Memory OrganizationTable 3-1, Special Function Register (cont´d) 1) Bit-addressable special function registers2) This spe

Semiconductor Group 3 - 7Memory OrganizationTable 3-1, Special Function Register 1) Bit-addressable special function registers2) This special func

Semiconductor Group 3 - 8Memory OrganizationTable 3-1, Special Function Register 1) Bit-addressable special function registers2) This special

Semiconductor Group 3 - 9Memory Organization3.4 Architecture for the XRAMThe contents of the XRAM is not affected by a reset or HW Power Down. After p

Semiconductor Group 3 - 10Memory OrganizationAccesses to XRAM using the Registers R0/R1The 8051 architecture provides also instructions for access to

Semiconductor Group 3 - 11Memory OrganizationFigure 3-2Write Page Address to Port 2 MOV P2, pageaddress will write the page address to Port 2 and X

Edition 05.94This edition was realized using the software system FrameMaker.Published by Siemens AG,Bereich Halbleiter, Marketing-Kommunikation, Bala

Semiconductor Group 3 - 12Memory OrganizationFigure 3-3Write Page Address to XPAGE The page address is only written to XPAGE-register. Port 2 is

Semiconductor Group 3 - 13Memory OrganizationFigure 3-4Use of Port 2 as I/O-Port At a write to Port 2, XRAM address in XPAGE-register will be ove

Semiconductor Group 3 - 14Memory OrganizationThe register XPAGE provides the upper address byte for accesses to XRAM with MOVX @Riinstructions. If the

Semiconductor Group 3 - 15Memory Organization3.4.2 Control of XRAM in the SAB 80C517A There are two control bits in register SYSCON which control the

Semiconductor Group 3 - 16Memory OrganizationA hardware protection is done by an unsymetric latch at XMAP0-bit. A unintentional disabling ofXRAM could

Semiconductor Group 3 - 17Memory OrganizationTable 3-3: Behaviour of P0/P2 and RD/WR During MOVX AccessesEA = 0 EA = 1XMAP1, XMAP0 XMAP1, XMAP000 10 X

Semiconductor Group 4 - 14 System Reset4.1 Additional Hardware Power Down Mode in the SAB 80C517A The SAB 80C517A has an additional Power Down Mode wh

Semiconductor Group 4 - 2Table 4-1, Status of all Pins During Hardware Power Down Mode Pins Status Voltage Range at Pin DuringHW-Power DownP0, P1,

Semiconductor Group 4 - 3The power down state is maintained while pin HWPD is held active. If HWPD goes to high level(inactive state) an automatic sta

Semiconductor Group 4 - 44.2 Hardware Power Down Reset TimingFollowing figures are showing the timing diagrams for entering (figure 4-1) and leaving

SAB 80C517A/83C517A-5Revision History: 05.94Previous Version: 11.92Page Subjects (major changes since last revision 11.92)3-84-15-35-10/5-11S0RELL ad

Semiconductor Group 4 - 5 Figure 4-1Timing Diagram of Entering Hardware Power Down ModeSystem Reset

Semiconductor Group 4 - 6 Figure 4-2Timing Diagram of Leaving Hardware Power Down ModeSystem Reset

Semiconductor Group 4 - 7 Figure 4-3Timing Diagram of Hardware Power Down Mode, HWPD-Pin is Active for only one cycleSystem Reset

Semiconductor Group 4 - 84.3 Fast internal Reset after Power-OnThe SAB 80C517A can use the oscillator watchdog unit for a fast internal reset procedur

Semiconductor Group 4 - 9After the on-chip oscillator finally has started, the oscillator watchdog detects the correct function;then the watchdog stil

Semiconductor Group 4 - 10 Figure 4-4Power-On of the SAB 80C517ASystem Reset

Semiconductor Group 5 - 1On-Chip Peripheral Components5 On-Chip Peripheral Components5.1 Digital I/O Port CircuitryTo realize the Hardware Power Down

Semiconductor Group 5 - 2On-Chip Peripheral ComponentsP1 and p3 are not active during Hardware Power Down.P1 is activated only for two oscillator peri

Semiconductor Group 5 - 3On-Chip Peripheral Components5.2 10-bit A/D-ConverterIn the SAB 80C517A is a new high performance / high speed 12-channel 10-

Semiconductor Group 5 - 4On-Chip Peripheral Components Figure 5-110-Bit A/D-Converter

80C517A/83C517A-5Semiconductor GroupContents Page1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Semiconductor Group 5 - 5On-Chip Peripheral ComponentsSpecial Function Registers ADCON0, ADCON1 The reset value of ADCON0 and ADCON1 is 00HBit F

Semiconductor Group 5 - 6On-Chip Peripheral ComponentsSpecial Function Register ADDATH, ADDATLThe reset value of ADDATH and ADDATL is 00H.The register

Semiconductor Group 5 - 7On-Chip Peripheral ComponentsA/D Converter TimingAfter a conversion has been started (by a write to ADDATL, external start by

Semiconductor Group 5 - 8On-Chip Peripheral Components5.3 Additional Compare Mode for the Concurrent Compare UnitThe SAB 80C517A has an additional com

Semiconductor Group 5 - 9On-Chip Peripheral ComponentsFigure 5-3Compare Mode 2 (Port 5 only)

Semiconductor Group 5 - 10On-Chip Peripheral ComponentsSpecial Function Register CC4EN The reset value of SFR CC4EN is 00H. Bit FunctionCOCO

Semiconductor Group 5 - 11On-Chip Peripheral ComponentsTable 5-3, Configurations for Concurrent Compare Mode and Compare Mode 2 at P5 The other

Semiconductor Group 5 - 12On-Chip Peripheral ComponentsThe following table 5-4 lists the SFR’s with their addresses and default values after reset whi

Semiconductor Group 5 - 13On-Chip Peripheral ComponentsExtended Prescaler for Timer 2The prescaler for Timer 2 has an extended range. This prescaler d

Semiconductor Group 5 - 14On-Chip Peripheral Components5.4 New Baud Rate Generators for Serial Channel 0 and Serial Channel 15.4.1 Serial Channel 0 Ba

Semiconductor Group 1 - 11 IntroductionThe SAB 80C517A is a superset of the high end microcontroller SAB 80C517.While maintaining all architectural an

Semiconductor Group 5 - 15On-Chip Peripheral ComponentsSpecial Function Register S0RELH, S0RELL Reset value of S0RELL is 0D9H, S0RELH contains XX

Semiconductor Group 5 - 16On-Chip Peripheral ComponentsFigure 5-5 shows a block diagram of the options available for baud rate generation of SerialCha

Semiconductor Group 5 - 17On-Chip Peripheral Components5.4.2 Serial Channel 1 Baud Rate GeneratorA new baud rate generator for Serial Channel 1 now of

Semiconductor Group 5 - 18On-Chip Peripheral ComponentsSpecial Function Register SRELH, SRELL Reset value of S1RELL is 00H, S1RELH contains XXXX

Semiconductor Group 5 - 19On-Chip Peripheral Components5.5 Modified Oscillator Watchdog UnitThe SAB 80C517A has a new oscillator watchdog unit that ha

Semiconductor Group 5 - 20On-Chip Peripheral ComponentsDetailled Description of the Oscillator Watchdog UnitFigure 5-7 shows the block diagram of the

Semiconductor Group 5 - 21On-Chip Peripheral ComponentsThe frequency coming from the RC oscillator is divided by 5 and compared to the on-chip oscilla

Semiconductor Group 6 - 16 Interrupt System6.1 Additional Interrupt for Compare Registers CM0 to CM7There is an additional interrupt which is vectored

Semiconductor Group 6 - 2Figure 6-1Interrupts of Compare Registers CM0-CM7 Assigned to Timer II Interrupt System

Semiconductor Group 6 - 3Special Function Register IRCON1 The reset value of IRCON1 is 00H.Bit FunctionICMPx Compare x interrupt request fl

Semiconductor Group 1 - 2Listed below is a summary of the main features of the SAB 80C517A: The pin functions of the SAB 80C517A are identical with

Semiconductor Group 6 - 46.2 Interrupt StructureThis section summarizes the expanded interrupt structure of the SAB 80C517A which has 3 newinterrupt v

Semiconductor Group 6 - 53.1 Priority Level StructureThe following tables show the SFR IEN2, the priority level grouping (table 6-1) and the priority

Semiconductor Group 6 - 6Table 6-1, Pairs and triplets of interrupt sources Table 6-2, Priority within Level External Interrupt 0 Ser

Device Specification7-1 05.944 Device Specification High-Performance SAB 80C517A/83C517A-58-Bit CMOS Single-Chip Microcontroller PreliminarySAB 83C51

Device SpecificationSemiconductor Group 7-2 Ordering InformationType Ordering codePackage Description8-bit C

Device SpecificationSemiconductor Group 7-3Logic Symbol

Device SpecificationSemiconductor Group 7-4The pin functions of the SAB 80C517A are identical with those of the SAB 80C517/80C537 with one exception:

Device SpecificationSemiconductor Group 7-5Pin Configuration(P-MQFP-100-2)

Device SpecificationSemiconductor Group 7-6Pin Definitions and FunctionsSymbol Pin Number I/O *)FunctionP-LCC-84 P-MQFP-100-2P4.0 – P4.7 1– 3, 5 – 9

Device SpecificationSemiconductor Group 7-7Pin Definitions and Functions (cont’d)Symbol Pin NumberI/O *)FunctionP-LCC-84 P-MQFP-100-2RESET 10 73 I RES

Semiconductor Group 2 - 12 Fundamental StructureThe SAB 80C517A/83C517A-5 is a high-end member of the Siemens SAB 8051 family ofmicrocontrollers. It i

Device SpecificationSemiconductor Group 7-8Pin Definitions and Functions (cont’d)Symbol Pin NumberI/O *)FunctionP-LCC-84 P-MQFP-100-2P3.0 - P3.7 21 -

Device SpecificationSemiconductor Group 7-9P1.7 - P1.0 29 - 36 98 - 100,1, 6 - 9I/O Port 1is a bidirectional I/O port with internalpull-up resistors.

Device SpecificationSemiconductor Group 7-10XTAL2 39 12 – XTAL2Input to the inverting oscillator amplifier and input to the internal clock generator c

Device SpecificationSemiconductor Group 7-11PSEN 49 22 O The Program Store Enableoutput is a control signal that enables the external program memory t

Device SpecificationSemiconductor Group 7-12HWPD 60 36 I Hardware Power DownA low level on this pin for the duration of one machine cycle while the os

Device SpecificationSemiconductor Group 7-13P6.0 - P6.7 70 - 77 46 - 50,54 - 56I/O Port 6is a bidirectional I/O port with internal pull-up resistors.

Device SpecificationSemiconductor Group 7-14Pin Definitions and Functions (cont’d)Symbol Pin NumberI/O *)FunctionP-LCC-84 P-MQFP-100-2RO 82 61 O Reset

Device SpecificationSemiconductor Group 7-15Figure 1Block Diagram

Device SpecificationSemiconductor Group 7-16Functional DescriptionThe SAB 80C517A is based on 8051 architecture. It is a fully compatible member of th

Device SpecificationSemiconductor Group 7-17Program Memory (’Code Space’)The SAB 83C517A-5 has 32 Kbyte of on-chip ROM, while the SAB 80C517A has no

Semiconductor Group 2 - 2 Figure 2-1, Block Diagram of the SAB 80C517A Fundamental Structure

Device SpecificationSemiconductor Group 7-18Data Memory (’Code Space’)The data memory space consists of an internal and an external memory space. The

Device SpecificationSemiconductor Group 7-19Accesses to XRAMBecause the XRAM is used in the same way as external data memory the same instruction type

Device SpecificationSemiconductor Group 7-20Special Function Register XPAGE The reset value of XPAGE is 00H.XPAGE can be set and read by software

Device SpecificationSemiconductor Group 7-21Control of XRAM in the SAB 80C517AThere are two control bits in register SYSCON which control the use and

Device SpecificationSemiconductor Group 7-22XMAP0 is hardware protected by an unsymmetric latch. An unintentional disabling of XRAM could be dangerous

Device SpecificationSemiconductor Group 7-23s00 10 X1DPTR < XRAMaddressrangeMOVX@RiMOVX@DPTRa) P0/P2➝Busb) RD/WR activec) ext. memory is useda)

Device SpecificationSemiconductor Group 7-24Multiple DatapointersAs a functional enhancement to standard 8051 controllers, the SAB 80C517A contains ei

Device SpecificationSemiconductor Group 7-25Special Function RegistersAll registers, except the program counter and the four general purpose register

Device SpecificationSemiconductor Group 7-26Table 2Special Function Register (cont’d)Address Register Contentsafter ResetAddress Register Contentsafte

Device SpecificationSemiconductor Group 7-27 Table 2Special Function Register (cont’d)Address Register Contentsafter ResetAddress Register Content

Semiconductor Group 3 - 1Memory Organization3 Memory OrganizationAccording to the SAB 8051 architecture, the SAB 80C517A has separate address spaces f

Device SpecificationSemiconductor Group 7-28Table 3Special Function Registers - Functional BlocksBlock Symbol Name Address Contentsafter ResetCPU ACCB

Device SpecificationSemiconductor Group 7-29Table 3Special Function Registers - Functional Blocks (cont’d)Block Symbol Name Address Contentsafter Rese

Device SpecificationSemiconductor Group 7-30Compare/Capture-Unit(CCU),(cont’d)CLRMSKCTCONCTRELHCTRELLTH2TL2T2CONMask Register, concerningCOMCLRCom. Ti

Device SpecificationSemiconductor Group 7-31Timer 0/Timer 1TCONTH0TH1TL0TL1TMODTimer Control RegisterTimer 0, High ByteTimer 1, High ByteTimer 0, Low

Device SpecificationSemiconductor Group 7-32A/D ConverterIn the SAB 80C517A a new high performance / high-speed 12-channel 10-bit A/D-Converter is imp

Device SpecificationSemiconductor Group 7-33Figure 4Block Diagram A/D Converter

Device SpecificationSemiconductor Group 7-34Compare/Capture Unit (CCU)The compare/capture unit is a complex timer/register array for applications that

Device SpecificationSemiconductor Group 7-35Table 4CCU Compare ConfigurationAssigned Timer Compare Register Compare Output Possible ModesTimer 2 CRCH/

Device SpecificationSemiconductor Group 7-36 Figure 5Block Diagram of the Compare/Capture Unit

Device SpecificationSemiconductor Group 7-37CompareIn compare mode, the 16-bit values stored in the dedicated compare registers are compared to the co